What is it?

The 68HG000 is a custom designed CPU implemented in an FPGA which is compatible with the Motorola 68K instruction set. It's purpose is to accurately emulate the 68k family of processors but offer more versatility in the form of new instructions, 64-bit register and instruction support, and more.

Why would you want to do that?

The short answer is that the Intel x86 ISA sucks. No, seriously. It's built on kludge after kludge to support ancient 16 bit code, a modern memory protection scheme and cutting edge 64 bit code. Even if that were necessary for modern systems – in this modern age of UEFI and 64 bit operating systems, it's really not – it could have been done in a much more cohesive manner. The obvious alternative is the 68K line of processors, however they, as luck would have it, are no longer in production. Although it is quite powerful, even the most recent member of the 68K family – the 68060 - isn't that impressive compared to modern chips at its factory rated top speed of 75 MHz, albeit some users hitting 105 MHz on certain mask revisions. And sure, you could just a more modern QUICC, ColdFire or DragonBall processor, but those aren't really direct descendants of the venerable 68K line. This project is intended to be an optimized version of what Motorola may have made after the 68060 had they not abandoned the 68K architecture for the then-revolutionary PowerPC.

What are the specs?

• Target speed of at least 250 MHz
• Fully 64 bit data and address bus
• A total of 32 registers, each 64 bits wide. Additionally, registers are addressable in sections a'la the x86.
• Instructions now work in 64 bits
• CPUID instruction (Finally!)
• 16 stage instruction pipeline
• Dual instruction and data caches, each 64K in size

What's the progress?

So far... none. This exists only in my head, and now here in pixels. I do, however, have an FPGA expert lined up with whom to discuss things and, after work is finished on the EPiC, I intend to proceed with this design.